SOI Academy 2019

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2019-05-23 13:00 - 2019-05-24 16:30

上海市长宁区长宁路865号5号楼3楼学术报告厅 [查看地图]

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About

Gain Expertise in FD-SOI

Experienced Chinese designers interested in gaining a solid expertise in FD-SOI will get a comprehensive understanding of design techniques for low-power chips including digital, mixed signal – RF & analog blocks, leveraging the multiple benefits and flexibility of FD-SOI technology. This training is offered by world-class Leti and industrial experts.

Agenda

Session 1: May 23 Plenary Talks

13:00 – 13:30 Registration
13:30 – 13:40 Opening Remarks

Dr. Mark Ding, CEO, SITRI

Mr. Jean-Eric Michallet, Head of Microelectronics Components department, Leti

13:40 – 13:55 Overview of Worldwide FD-SOI Ecosystem
Dr. Carlos Mazure, EVP, Soitec; Chairman and Executive Director, SOI Industry Consortium
13:55 – 14:10 FD-SOI Applications around the Connected Car
Mr. Jean-Eric Michallet, Head of Microelectronics Components department, Leti
14:10 – 14:50 FD-SOI Technology, from 28nm to sub-10nm
Dr. François Andrieu, Head of Advanced CMOS Laboratory, Leti
14:50 – 15:20 Introduction to SOI Substrate Advanced Development
Dr. Walter Schwarzenbach, Technology Leader, Soitec
15:20 – 15:40 Networking Break
15:40 – 16:00 FD-SOI Activities in China
Speaker TBD, VeriSilicon
16:00 – 16:20 Foundry FD-SOI offering
Dr. Liu Deqi, Director of Eco-system Development, Globalfoundries
16:20 – 17:05 FD-SOI Product Design Introduction
Dr. Christophe Tretz, Senior Engineer, Sector Lead, IBM, SOI Industry Consortium
17:05 – 17:50 FD-SOI Analog & RF Product Design Introduction
Speaker TBD, NXP Semiconductor
17 :50 – 18 :00 Wrap up and Conclusion
Mr. Jean-Eric Michallet, Head of Microelectronics Components department, Leti
18:00 – 19:30 Buffet Dinner

Session 2 : May 24 Hands-on Training
09:00 – 12:00 Training on the Basics of FD-SOI Digital Circuit Design
Dr. Alexandre Valentian, Senior Expert, Leti
        Digital Modules:
        - The back-interface lever
        - Impact on combinatorial and sequential cells: Critical Path Replica and Flip-flop
        - Optimal energy point determination
        Power switch optimization
        - LVT/HVT co-integration strategy

        - Poly-bias option
12:00 – 13:30 Lunch
13:30 – 16:30 Training on the Basics of FD-SOI RF Circuit Design
Dr. Baudouin Martineau, Senior Expert, Leti
        RF Modules:
        - A tunable ultra-low power inductor less low noise amplifier exploiting body biasing of FD-SOI technology
        - A reconfigurable, efficiency improved, low noise amplifier for 5G applications using FD-SOI

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