Gain Expertise in FD-SOI
Experienced Chinese designers interested in gaining a solid expertise in FD-SOI will get a comprehensive understanding of design techniques for low-power chips including digital, mixed signal – RF & analog blocks, leveraging the multiple benefits and flexibility of FD-SOI technology. This training is offered by world-class Leti and industrial experts.
Session 1: May 23 Plenary Talks
13:00 – 13:30 Registration
13:30 – 13:40 Opening Remarks
● Dr. Mark Ding, CEO, SITRI
● Mr. Jean-Eric Michallet, Head of Microelectronics Components department, Leti
13:40 – 13:55 Overview of Worldwide FD-SOI Ecosystem
● Dr. Carlos Mazure, EVP, Soitec; Chairman and Executive Director, SOI Industry Consortium 
13:55 – 14:10 FD-SOI Applications around the Connected Car 
● Mr. Jean-Eric Michallet, Head of Microelectronics Components department, Leti 
14:10 – 14:50 FD-SOI Technology, from 28nm to sub-10nm
● Dr. François Andrieu, Head of Advanced CMOS Laboratory, Leti
14:50 – 15:20 Introduction to SOI Substrate Advanced Development
● Dr. Walter Schwarzenbach, Technology Leader, Soitec
15:20 – 15:40 Networking Break
15:40 – 16:00 FD-SOI Activities in China
● Speaker TBD, VeriSilicon
16:00 – 16:20 Foundry FD-SOI offering
● Dr. Liu Deqi, Director of Eco-system Development, Globalfoundries
16:20 – 17:05 FD-SOI Product Design Introduction
● Dr. Christophe Tretz, Senior Engineer, Sector Lead, IBM, SOI Industry Consortium
17:05 – 17:50 FD-SOI Analog & RF Product Design Introduction 
● Speaker TBD, NXP Semiconductor
17 :50 – 18 :00 Wrap up and Conclusion
● Mr. Jean-Eric Michallet, Head of Microelectronics Components department, Leti
18:00 – 19:30 Buffet Dinner
Session 2 : May 24 Hands-on Training
09:00 – 12:00 Training on the Basics of FD-SOI Digital Circuit Design
● Dr. Alexandre Valentian, Senior Expert, Leti
        Digital Modules:
        - The back-interface lever
        - Impact on combinatorial and sequential cells: Critical Path Replica and Flip-flop
        - Optimal energy point determination
        Power switch optimization
        - LVT/HVT co-integration strategy
        - Poly-bias option
12:00 – 13:30 Lunch
13:30 – 16:30 Training on the Basics of FD-SOI RF Circuit Design
● Dr. Baudouin Martineau, Senior Expert, Leti
        RF Modules:
        - A tunable ultra-low power inductor less low noise amplifier exploiting body biasing of FD-SOI technology
        - A reconfigurable, efficiency improved, low noise amplifier for 5G applications using FD-SOI
							Dr. Carlos Mazure(-)
							Dr. François Andrieu(-)
							Dr. Alexandre Valentian(-)
							Dr. Baudouin Martineau(-)
							Dr. Frédéric Hameau(-)
							Dr. Waletr Schwarzenbach(-)
							Dr Christophe Tretz(-)
							Mr. Jean-Eric Michallet(-)
为了进一步促进SOI技术,特别是FD-SOI的生态系统建设和产品化应用,SOI Academy 2019活动于5月23日至24日在中国科学院上海微系统与信息技术研究所(长宁园区)成功举行。这是第二次由中科院上海微系统所(SIMIT)、法国原子能委员会电子与信息技术实验室(CEA-Leti)、上海微技术工业研究院(SITRI)和SOI国际产业联盟(SOI Industry Consortium)联合组办。
发布于:2019年05月27日